Plasma-enhanced chemical vapor deposition (PECVD) is an important and widely practice method of depositing films in advanced semiconductor integrated circuits. In PECVD, a precursor gas is admitted into a reaction chamber held at a reduced pressure, and oscillatory electric energy at a radio frequency (RF) is applied to the chamber to excite the gas into a plasma. The gas reacts with the surface of a wafer exposed to the plasma to form a film on the wafer of a composition derived from that of the precursor gas.
Probably the widest use of PECVD for silicon integrated circuits involves the deposition of silicon dioxide (SiO.sub.2), also referred to as silica or simply oxide. The oxide forms an insulating layer, for example, between layers of electrical interconnects. The favored precursor for silicon dioxide formed by PECVD is tetraethyl orthosilicate (TEOS). PECVD is the favored technique for depositing oxide because the plasma supplies the activation energy rather than in a thermally activated process in which high temperature provides the energy. Therefore, the oxide can be deposited at relatively low temperatures over previously defined features, thereby reducing the thermal budget used for the oxide.
Sputtering (also called physical vapor deposition or PVD) has enjoyed the widest use in the deposition of layers of metals and other conductive materials because of its high deposition rate and low cost of precursor materials. However, sputtering is a generally ballistic process and has difficulty in coating narrow and deep apertures, of the sort required for via and contact holes between wiring layers. One favored technique for filling such holes is to first conformally coat the walls of the hole with a thin layer of titanium (Ti) and then to conformally coat the Ti-covered walls with a thin layer of titanium nitride (TiN). Thereafter, sputtered aluminum more easily fills into the hole. The Ti/TiN layer, generally referred to as a liner, provides good adhesion between the titanium and the oxide walls, and the TiN forms a barrier against aluminum migration.
It is possible to use sputtering to deposit an approximately conformal coating in holes of high aspect ratios, but much effort is being expended in using CVD or PECVD for one or both of these layers. It is known to deposit CVD TiN using tetrakis-dimethyl-amido titanium (TDMAT) as a precursor. This material is a metal-organic compound which is a liquid at room temperature. The TDMAT CVD process requires thermal decomposition, preferably around 450.degree. C., and a subsequent plasma treatment to remove the carbon content in the as-deposited film. It is also known to deposit CVD Ti using titanium tetrachloride (TiCl.sub.4) as the precursor. TiCl.sub.4 is also a liquid at the temperatures involved and so requires a bubbler or a liquid injector to produce a gas-phase precursor, but this difference does not directly affect most aspects of the plasma processing in which the gas entraining the TiCl.sub.4 is energized into a plasma adjacent to the wafer so as to activate the reaction causing titanium to deposit on the wafer.
The chemical vapor deposition of a metal layer in a plasma chamber introduces problems not experienced in PECVD chambers used for the deposition of dielectrics. Almost inevitably, some of the metal is deposited on parts of the chamber other than the wafer. The metal may be deposited on dielectric members in the chamber intended to electrically isolate various portions of the chamber. At worst, the extra metal could short out the RF-biased gas showerhead. At a minimum, the changing extent of the grounding surfaces will cause the electrical fields to vary, thus causing the uniformity of the plasma and thus the uniformity of deposition to vary over time. Accordingly, the chamber must be designed to both minimize the effect of any metal deposited on chamber parts in the processing area and also to minimize the deposition of metal in areas away from the processing.
Very recent work of others has demonstrated that the titanium deposition rate and deposition uniformity using TiCl.sub.4 as the precursor can be greatly increased by maintaining the wafer at a relatively high temperatures during the plasma deposition, despite the fact that deposition is primarily plasma activated. A desired temperature range extends between 600.degree. C. and 750.degree. C. At these temperatures, there are several problems not experienced at the lower temperatures experienced in dielectric deposition.
Zhao et al. have addressed some of these problems, at least for TiN, in U.S. pat. application, Ser. No. 08/680,724, filed Jul. 12, 1996, and issued as U.S. Pat. No. 5,846,332 and incorporated herein by reference in its entirety, which discloses the CVD reactor illustrated in cross-section in FIG. 1. This figure illustrates many of the features of the TiNxZ CVD reactor available from Applied Materials, Inc. of Santa Clara, Calif.
A wafer 10 is supported on a surface 12 of a heater pedestal 14 illustrated in its raised, deposition position. In its lowered, loading position a lifting ring 16 attached to a lift tube 17 lifts four lift pins 18 slidably fitted into the heater pedestal 14 so that the pins 18 can receive the wafer 10 loaded into the chamber through a loadlock port 19 in the reactor body 20. The heater pedestal 14 includes an electrical resistance heater 21, which controllably heats the wafer 10 it supports. The temperatures experienced in a TiN reactor are low enough to allow the heater pedestal 14 and attached heater to be principally formed of aluminum. Often at least the upper part of the heater pedestal 14 is referred to simply as the heater.
In its upper, deposition position, the heater pedestal 14 holds the wafer 10 in close opposition to a lower surface 22 of a faceplate 24, a processing region 26 being defined between the wafer 10 and the surface 22. The faceplate 24, often referred to as a showerhead, has a large number of apertures 28 in its lower surface 22 communicating between a lower distribution cavity 30 and the processing region 26 to allow the passage of processing gas. The processing gas is supplied through a gas port 32 formed at the center of a water-cooled gas box plate 36 made of aluminum. The upper side of the gas box plate 36 is covered by a water cooling cover plate 34 surrounding the upper portion of the gas box plate 36 that includes the gas port 32. The gas port 32 supplies the processing gas to an upper cavity 38 separated from the lower cavity 30 by a blocker plate 40, also having a large number of apertures 42 therethrough. One purpose of the cavities 30, 38, the perforated showerhead 24, and blocker plate 40 is to evenly distribute the processing gas over the upper face of the wafer 10.
A standard showerhead provided with the TiNxZ chamber has a somewhat irregular hole pattern, illustrated in the partial plan view of FIG. 2 of the showerhead face 22. A first set of holes 42 are arranged in two circles generally bracketing the periphery of the wafer 10. A second set of holes 44 are arranged in an hexagonal close packed array inside the two circles. The spacings of both sets of holes 42, 44 equal about the same small value so that the distribution of holes is fairly uniform. Law et al. in U.S. Pat. No. 4,960,488 disclose a showerhead having two densities of holes, but different gases are injected through the two sets of holes.
Returning to FIG. 1, a single circular channel or moat 46 is formed in the top of the gas box plate 36 and is sealed by the cooling water cover plate 34. Two water ports 48, 50 are formed in the center portion of the gas box plate 36 also occupied by the gas port and respectively act as inlet and outlet for cooling water supplied to cool the showerhead 24. Often a 50:50 mixture of water and glycol is used to efficiently remove heat and maintain process stability. This cooling liquid and any other cooling liquid will be hence forward referred to as cooling water. The gas box including the gas box plate 36 and the cooling water cover plate 34 rests on a fairly narrow circular ledge 52 of the showerhead 24, and a gap 54 is necessarily formed between the outer circumferential surface of the cooling water cover plate 34 and the upper, inner annular surface of the showerhead 24 because of the different temperatures that may develop in the two pieces. The cooling water cools the showerhead 24 to maintain it at a low temperature despite the plasma heating and resistive heating of the heater pedestal 14. Thereby, the processing gas tends not to coat the showerhead 24 and clog its apertures 28.
An RF power source 60 is connected to the showerhead 24 and to the gas box plate 36 and acts against the grounded chamber body 20 and the grounded heater pedestal 14 to form a plasma of the processing gas in the processing region 26. A lid isolator 64 is interposed between the showerhead 24 and a metal lid rim 66, which can be lifted off the chamber body 20 to open the chamber to provide maintenance access. The lid isolator 64 is made of an electrically insulating ceramic to isolate the RF-biased showerhead 24 from the grounded chamber body 20. A flange 66 of the showerhead 24 rests on a flange 67 of the isolator 64 through an upper, outer, bottom face 68 located above its ledge 52 supporting the gas box plate 36. Law et al., ibid., disclose an alternative arrangement of the showerhead isolator and the gas box plate.
The vacuum within the reactor is maintained by a vacuum pump 70 connected to a pump plenum 72 in the reactor body 20, which connects to an annular pumping channel 74. FIG. 3 better illustrates the pumping channel 74 defined by the lid isolator 64, a lid liner 76, an outer shield 78, an insulating chamber insert ring 82 fit in the chamber body 20, and a metal inner shield 84 fit in the chamber insert ring 82. The pumping channel 74 is connected to the processing region 26 through a straight choke aperture 86 formed between the lid isolator 24 and the metal inner shield 84. The liners 76, 78 can be easily removed during servicing to prevent build up of a metallic coating on the walls of the pumping channel 74.
An edge ring 90 is positioned within an annular ledge 92 located at the upper peripheral edge of the heater pedestal 14. The edge ring 90 is generally circular but may be modified to conform to a flat of the wafer 10. The edge ring 90 operates to center the wafer 10 through unillustrated centering bosses located at the edge of an inwardly facing annular ledge 94 of the centering ring 90. The edge ring 90 also operates to thermally isolate the ledge 92 of the heater pedestal 14 otherwise exposed by the wafer 10 on top of the heater pedestal 14. The ring 90 is supported by three ceramic pins 96 fixed to the heater pedestal 14 but sliding in short radial grooves 98 at the bottom of an outer, lower arm 100 of the edge ring 90. As better illustrated in the sectioned isometric view of FIG. 4, two thermally isolating rings 102, 104 are fixed to the bottom of an inner, upper arm 106 of the edge ring 90 by flat-headed fasteners 108. Two washers 110 placed on each fastener 108 creates a first thermally isolating gap between the upper arm 106 of the centering ring 100 and the upper isolating ring 102, a second one between the two isolating rings 102, 104, and a third one between the lower isolating ring 104 and the bottom of the ledge 92.
The structure of the thermally floating edge ring 90 and its two thermally isolating rings 102, 104 serves to thermally shield the edge ring 90 from the underlying heater pedestal 14. As a result, the periphery of the heater pedestal 14 exposed by the wafer 10 is maintained at a substantially lower temperature than the central portion to avoid undesirable film buildup during extended use. At the central portion of the heater pedestal 14, the temperature profile is flattened so that the uniformity of deposition is greatly improved.
Although the above features contribute to an improved operation of a CVD reactor, particularly one intended for deposition of a metal or other conductor such as TiN, further improvements are desired.
The deposition should be made as uniform as possible by any available means. If there is any non-uniformity towards the edges, the variation should be toward a somewhat thicker layer. If the variation is toward a thinner layer, there is a danger that a vanishingly small thickness is deposited in some portion of the wafer, thus severely impacting yield of operable chips. However, experience has shown that even with the improved chamber of FIGS. 1 through 4 the TiN layer tends to thin toward the edges.